Please use this identifier to cite or link to this item: http://hdl.handle.net/1893/630
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dc.contributor.authorCsopaki, Gyula-
dc.contributor.authorTurner, Kenneth J-
dc.contributor.editorMizuno, Tadanori-
dc.contributor.editorShiratori, Norio-
dc.contributor.editorHigashino, Teruo-
dc.contributor.editorTogashi, Atsushi-
dc.date.accessioned2017-08-17T00:26:06Z-
dc.date.available2017-08-17T00:26:06Z-
dc.date.issued1997-
dc.identifier.urihttp://hdl.handle.net/1893/630-
dc.description.abstractThe specification of digital logic in SDL (Specification and Description Language) is investigated. A specification approach is proposed for multi-level descriptions of hardware behaviour and structure. The modelling method exploits features introduced in SDL-92. The approach also deals with the specification, analysis and simulation of timing aspects at any level in the specification of digital logic.en_UK
dc.language.isoen-
dc.publisherSpringer Verlag-
dc.relationCsopaki G & Turner KJ (1997) Modelling Digital Logic in SDL In: Mizuno Tadanori, Shiratori Norio, Higashino Teruo, Togashi Atsushi (ed.) Formal Description Techniques and Protocol Specification, Testing and Verification. FORTE X / PSTV XVII '97, Amsterdam: Springer Verlag. FORTE/PSTV'97 - 1997 IFIP TC6/WG6.1 Joint International Conference on Formal Description Techniques (X) for Distributed Systems and Communication Protocols, and PROTOCOL SPECIFICATION, TESTING, AND VERIFICATION (XVII), 18.11.1997 - 21.11.1997, Osaka, Japan, pp. 367-382.-
dc.relation.ispartofseriesIFIP International Federation for Information Processing-
dc.rightsPublished by Springer Verlag. The original publication is available at www.springer.com-
dc.titleModelling Digital Logic in SDLen_UK
dc.typeConference Paperen_UK
dc.citation.spage367-
dc.citation.epage382-
dc.citation.publicationstatusPublished-
dc.citation.peerreviewedRefereed-
dc.type.statusPost-print (author final draft post-refereeing)-
dc.identifier.urlhttp://www.springer.com/computer/communications/book/978-0-412-82060-1?detailsPage=toc-
dc.author.emailkjt@cs.stir.ac.uk-
dc.citation.btitleFormal Description Techniques and Protocol Specification, Testing and Verification. FORTE X / PSTV XVII '97-
dc.citation.conferencedates1997-11-18T00:00:00Z-
dc.citation.conferencelocationOsaka, Japan-
dc.citation.conferencenameFORTE/PSTV'97 - 1997 IFIP TC6/WG6.1 Joint International Conference on Formal Description Techniques (X) for Distributed Systems and Communication Protocols, and PROTOCOL SPECIFICATION, TESTING, AND VERIFICATION (XVII)-
dc.citation.isbn9780412820601-
dc.publisher.addressAmsterdam-
dc.contributor.affiliationBudapest University of Technology And Economics-
dc.contributor.affiliationComputing Science - CSM Dept-
Appears in Collections:Computing Science and Mathematics Conference Papers and Proceedings

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