Please use this identifier to cite or link to this item: http://hdl.handle.net/1893/27565
Appears in Collections:Computing Science and Mathematics Conference Papers and Proceedings
Author(s): Bhowmik, Deepayan
Garcia, Paulo
Wallace, Andrew
Stewart, Robert
Michaelson, Greg
Title: Power efficient dataflow design for a heterogeneous smart camera architecture
Citation: Bhowmik D, Garcia P, Wallace A, Stewart R & Michaelson G (2017) Power efficient dataflow design for a heterogeneous smart camera architecture In: 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP). 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP), Dresden, Germany, 27.09.2017-29.09.2017. Dresden, Germany: IEEE. https://doi.org/10.1109/dasip.2017.8122128.
Issue Date: Sep-2017
Conference Name: 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)
Conference Dates: 2017-09-27 - 2017-09-29
Conference Location: Dresden, Germany
Abstract: The following topics are dealt with: field programmable gate arrays; cameras; system-on-chip; multiprocessing systems; computer vision; embedded systems; microprocessor chips; object detection; image sensors; mobile robots.
Status: AM - Accepted Manuscript
Rights: © 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

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