Please use this identifier to cite or link to this item: http://hdl.handle.net/1893/26512
Appears in Collections:Computing Science and Mathematics Journal Articles
Peer Review Status: Refereed
Title: A Power-Efficient Capacitive Read-Out Circuit with Parasitic-Cancellation for MEMS Cochlea Sensors
Author(s): Wang, Shiwei
Koickal, Thomas Jacob
Hamilton, Alister
Mastropaolo, Enrico
Cheung, Rebecca
Abel, Andrew
Smith, Leslie
Wang, Lei
Contact Email: leslie.smith@stir.ac.uk
Keywords: Capacitive read-out
chopper-stabilization
low capacitance measurement
MEMS cochlea
parasitic-cancellation
sensor interface
Issue Date: Feb-2016
Date Deposited: 12-Jan-2018
Citation: Wang S, Koickal TJ, Hamilton A, Mastropaolo E, Cheung R, Abel A, Smith L & Wang L (2016) A Power-Efficient Capacitive Read-Out Circuit with Parasitic-Cancellation for MEMS Cochlea Sensors. IEEE Transactions on Biomedical Circuits and Systems, 10 (1), pp. 25-37. https://doi.org/10.1109/TBCAS.2015.2403251
Abstract: This paper proposes a solution for signal read-out in the MEMS cochlea sensors that have very small sensing capacitance and do not have differential sensing structures. The key challenge in such sensors is the significant signal degradation caused by the parasitic capacitance at the MEMS-CMOS interface. Therefore, a novel capacitive read-out circuit with parasitic-cancellation mechanism is developed; the equivalent input capacitance of the circuit is negative and can be adjusted to cancel the parasitic capacitance. Chip results prove that the use of parasitic-cancellation is able to increase the sensor sensitivity by 35 dB without consuming any extra power. In general, the circuit follows a low-degradation low-amplification approach which is more power-efficient than the traditional high-degradation high-amplification approach; it employs parasitic-cancellation to reduce the signal degradation and therefore a lower gain is required in the amplification stage. Besides, the chopper-stabilization technique is employed to effectively reduce the low-frequency circuit noise and DC offsets. As a result of these design considerations, the prototype chip demonstrates the capability of converting a 7.5 fF capacitance change of a 1-Volt-biased 0.5 pF capacitive sensor pair into a 0.745 V signal-conditioned output at the cost of only 165.2 μW power consumption. © 2015 IEEE.
DOI Link: 10.1109/TBCAS.2015.2403251
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