Please use this identifier to cite or link to this item: http://hdl.handle.net/1893/631
Appears in Collections:Computing Science and Mathematics Conference Papers and Proceedings
Peer Review Status: Refereed
Authors: He, Ji
Turner, Kenneth J
Contact Email: kjt@cs.stir.ac.uk
Title: Verifying and Testing Asynchronous Circuits using LOTOS (extended version)
Editors: Bolognesi, Tommaso
Latella, Diego
Citation: He J & Turner KJ (2000) Verifying and Testing Asynchronous Circuits using LOTOS (extended version), Bolognesi Tommaso, Latella Diego (ed.) Formal Methods for Distributed System Development, FORTE/PSTV 2000 - IFIP TC6/WG6.1 Joint International Conference on FORMAL DESCRIPTION TECHNIQUES for Distributed Systems and Communication Protocols (FORTE XIII) and PROTOCOL SPECIFICATION, TESTING, AND VERIFICATION (PSTV XX), Pisa, Italy, Amsterdam: Springer Verlag, pp. 267-283.
Issue Date: 2000
Series/Report no.: IFIP International Federation for Information Processing, vol 55
Conference Name: FORTE/PSTV 2000 - IFIP TC6/WG6.1 Joint International Conference on FORMAL DESCRIPTION TECHNIQUES for Distributed Systems and Communication Protocols (FORTE XIII) and PROTOCOL SPECIFICATION, TESTING, AND VERIFICATION (PSTV XX)
Conference Location: Pisa, Italy
Abstract: It is shown howDILL (Digital Logic in LOTOS) can be used to specify,verify and test asynchronous hardware designs. Asynchronous (unclocked) circuits are a topic of active research in the hardware community. It is illustrated how DILL can address some of the key challenges. New relations for (strong) conformance are defined for assessing a circuit implementation against its specification. An algorithm is also presented for generating and applying implementation tests based on a specification. Tools have been developed for automated verification of conformance and generation of tests. The approach is illustrated with three case studies that explore speed independence, delay sensitivity and testing of sample asynchronous circuit designs.
Type: Conference Paper
Status: Post-print (author final draft post-refereeing)
Rights: Published by Springer Verlag. The original publication is available at www.springer.com
URI: http://hdl.handle.net/1893/631
URL: http://www.springer.com/computer/artificial/book/978-0-7923-7968-3?detailsPage=toc
Affiliation: University of Stirling
Computing Science - CSM Dept

Files in This Item:
File Description SizeFormat 
async-lot.pdf164.5 kBAdobe PDFView/Open


This item is protected by original copyright



Items in the Repository are protected by copyright, with all rights reserved, unless otherwise indicated.

If you believe that any material held in STORRE infringes copyright, please contact library@stir.ac.uk providing details and we will remove the Work from public display in STORRE and investigate your claim.