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Please use this identifier to cite or link to this item: http://hdl.handle.net/1893/618
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dc.contributor.authorHe, Jien_UK
dc.contributor.authorTurner, Kenneth Jen_UK
dc.contributor.editorWu, Jianpingen_UK
dc.contributor.editorChanson, Samuel Ten_UK
dc.contributor.editorGao, Quiangen_UK
dc.date.accessioned2017-08-16T23:09:40Z-
dc.date.available2017-08-16T23:09:40Z-
dc.date.issued1999en_UK
dc.identifier.urihttp://hdl.handle.net/1893/618-
dc.description.abstractThis paper investigates specification and verification of synchronous circuits using DILL (Digital Logic in LOTOS). After an overview of the DILL approach, the paper focuses on the characteristics of synchronous circuits. A more constrained model is presented for specifying digital components and verifying them. Two standard benchmark circuits are specified using this new model, and analysed by the CADP toolset (Cæsar/Aldébaran Development Package).en_UK
dc.language.isoenen_UK
dc.publisherSpringer Verlagen_UK
dc.relationHe J & Turner KJ (1999) Specification and Verification of Synchronous Hardware using LOTOS. In: Wu J, Chanson ST & Gao Q (eds.) Formal Methods for Protocol Engineering and Distributed Systems. IFIP International Federation for Information Processing, Vol. 28. FORTE XII /PSTV XIX '99 IFIP TC6/WG 6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols and Protocol Specification, Testing and Verification, Beijing, China, 05.10.1999-08.10.1999. Amsterdam: Springer Verlag, pp. 295-312. http://www.springer.com/computer/artificial/book/978-0-7923-8646-9?detailsPage=tocen_UK
dc.relation.ispartofseriesIFIP International Federation for Information Processing, Vol. 28en_UK
dc.rightsPublished by Springer Verlag. The original publication is available at www.springer.comen_UK
dc.titleSpecification and Verification of Synchronous Hardware using LOTOSen_UK
dc.typeConference Paperen_UK
dc.citation.spage295en_UK
dc.citation.epage312en_UK
dc.citation.publicationstatusPublisheden_UK
dc.citation.peerreviewedRefereeden_UK
dc.type.statusAM - Accepted Manuscripten_UK
dc.identifier.urlhttp://www.springer.com/computer/artificial/book/978-0-7923-8646-9?detailsPage=tocen_UK
dc.author.emailkjt@cs.stir.ac.uken_UK
dc.citation.btitleFormal Methods for Protocol Engineering and Distributed Systemsen_UK
dc.citation.conferencedates1999-10-05 - 1999-10-08en_UK
dc.citation.conferencelocationBeijing, Chinaen_UK
dc.citation.conferencenameFORTE XII /PSTV XIX '99 IFIP TC6/WG 6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols and Protocol Specification, Testing and Verificationen_UK
dc.citation.isbn9780792386469en_UK
dc.publisher.addressAmsterdamen_UK
dc.contributor.affiliationUniversity of Stirlingen_UK
dc.contributor.affiliationComputing Scienceen_UK
dc.identifier.wtid831799en_UK
dcterms.dateAccepted1999-12-31en_UK
dc.date.filedepositdate2008-12-16en_UK
rioxxterms.typeConference Paper/Proceeding/Abstracten_UK
rioxxterms.versionAMen_UK
local.rioxx.authorHe, Ji|en_UK
local.rioxx.authorTurner, Kenneth J|en_UK
local.rioxx.projectInternal Project|University of Stirling|https://isni.org/isni/0000000122484331en_UK
local.rioxx.contributorWu, Jianping|en_UK
local.rioxx.contributorChanson, Samuel T|en_UK
local.rioxx.contributorGao, Quiang|en_UK
local.rioxx.freetoreaddate2008-12-16en_UK
local.rioxx.licencehttp://www.rioxx.net/licenses/all-rights-reserved|2008-12-16|en_UK
local.rioxx.filenamesync-lot.pdfen_UK
local.rioxx.filecount1en_UK
local.rioxx.source9780792386469en_UK
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